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[WIP] Implementing encoding
[jade-mouse] / isa.txt
1 4 16-bit general-purpose registers r0, r1, r2, r3
2
3 ALU2: misc ??? add sub addpc and or xor
4 ALU1: inc dec neg comp
5 ALUA: add
6 ALUI: lsl lsr asr rol clr set tog ext
7
8 7654_3210
9 --------- --------
10 0000_0000 => HALT: halt
11 0000_0001 => NOPE: nope
12 0000_xxxx => RESERVED
13 0ooo_aabb => ALU2: a = a op b
14 1000_aabb => JALR: jalr ra # when a == b
15 1000_aabb => MOVE: a = b # when a != b
16 1001_aaoo => ALU1: a = op a
17 101f_aabb => LDST: a <-> [b]
18 110o_aabb oiiiiiii => BRNC: branch if a op b # when a != b
19 1100_0000 iiiiiiii => JUMP: jump offset
20 1101_aabb fiiiiiii => LSI0: a <-> [imm * 2] # a == b
21 1110_aa00 iiiiiiii => ALUA: a = a + imm
22 1110_aa01 ooooiiii => ALUI: a = a op imm
23 1110_aa10 iiiiiiii => LDLI: lo(a) = imm
24 1110_aa11 iiiiiiii => LDUI: hi(a) = imm
25 1111_aabb wpsiiiii => MEM2
26
27
28 7654_3210 wps (write | push/pop | size)
29 --------- --------
30 1111_aabb 000iiiii => LDBI
31 1111_aabb 001iiiii => LDWI
32 1111_aabb 100iiiii => STBI
33 1111_aabb 101iiiii => STWI
34 1111_aabb 010iiiii => POPB
35 1111_aabb 011iiiii => POPW
36 1111_aabb 110iiiii => PSHB
37 1111_aabb 111iiiii => PSHW
38
39
40 Encoding branch conditions:
41 We want: eq/ne, test/testn, lt/gt, ule/ugt
42 We have 2 operand bits, so we can encode eq, test, lt, ult, and get the negations by swapping operands.
43 For example, if aa < bb, then we use eq, and if bb < aa, we use ne.
44 This is natural for lt/gt, and the comparison for eq/ne etc. just needs 1 LUT4.
45
46 Load/store should use register pairs, and then specific registers numbers can encode whether it should use the larger instructions.
47
48 Skip is valuable because it lets you implement wider add/sub with a relatively short instruction sequence, in particular this wide add is 4 bytes not 5.
49 For instance, you can do:
50
51 a1 = a1 + b1
52 a2 = a2 + b2
53 branch if b1 ule a1
54 a2 = a2 + 1
55
56 to compute [a2:a1] + [b2:b1]