From efbb5e2439ebb076af95e513943689636641fc3e Mon Sep 17 00:00:00 2001
From: Cassie Jones <code@witchoflight.com>
Date: Sun, 19 Jan 2020 05:01:59 -0500
Subject: [PATCH] Add more mid-byte underscores to the ISA spec

For consistency with the first byte in the multi-byte instructions, and
to make it look nicer to translate the specs directly to the code.
---
 isa.txt | 54 +++++++++++++++++++++++++++---------------------------
 1 file changed, 27 insertions(+), 27 deletions(-)

diff --git a/isa.txt b/isa.txt
index 89ece1a..846e799 100644
--- a/isa.txt
+++ b/isa.txt
@@ -1,40 +1,40 @@
 4 16-bit general-purpose registers r0, r1, r2, r3
 
-ALU2: misc ??? add sub addpc and or xor
+ALU2: misc misc add sub addpc and or xor
 ALU1: inc dec neg comp
 ALUA: add
 ALUI: lsl lsr asr rol clr set tog ext
 
 7654_3210
---------- --------
-0000_0000          => HALT: halt
-0000_0001          => NOPE: nope
-0000_xxxx          => RESERVED
-0ooo_aabb          => ALU2: a = a op b
-1000_aabb          => JALR: jalr ra  # when a == b
-1000_aabb          => MOVE: a = b    # when a != b
-1001_aaoo          => ALU1: a = op a
-101f_aabb          => LDST: a <-> [b]
-110o_aabb oiiiiiii => BRNC: branch if a op b  # when a != b
-1100_0000 iiiiiiii => JUMP: jump offset
-1101_aabb fiiiiiii => LSI0: a <-> [imm * 2]  # a == b
-1110_aa00 iiiiiiii => ALUA: a = a + imm
-1110_aa01 ooooiiii => ALUI: a = a op imm
-1110_aa10 iiiiiiii => LDLI: lo(a) = imm
-1110_aa11 iiiiiiii => LDUI: hi(a) = imm
-1111_aabb wpsiiiii => MEM2
+--------- ---------
+0000_0000           => HALT: halt
+0000_0001           => NOPE: nope
+000?_????           => RESERVED
+0ooo_aabb           => ALU2: a = a op b
+1000_aabb           => JALR: jalr ra  # when a == b
+1000_aabb           => MOVE: a = b    # when a != b
+1001_aaoo           => ALU1: a = op a
+101f_aabb           => LDST: a <-> [b]
+110o_aabb oiii_iiii => BRNC: branch if a op b  # when a != b
+1100_0000 iiii_iiii => JUMP: jump offset
+1101_aabb fiii_iiii => LSI0: a <-> [imm * 2]  # a == b
+1110_aa00 iiii_iiii => ALUA: a = a + imm
+1110_aa01 oooo_iiii => ALUI: a = a op imm
+1110_aa10 iiii_iiii => LDLI: lo(a) = imm
+1110_aa11 iiii_iiii => LDUI: hi(a) = imm
+1111_aabb wpsi_iiii => MEM2
 
 
 7654_3210 wps      (write | push/pop | size)
---------- --------
-1111_aabb 000iiiii => LDBI
-1111_aabb 001iiiii => LDWI
-1111_aabb 100iiiii => STBI
-1111_aabb 101iiiii => STWI
-1111_aabb 010iiiii => POPB
-1111_aabb 011iiiii => POPW
-1111_aabb 110iiiii => PSHB
-1111_aabb 111iiiii => PSHW
+--------- ---------
+1111_aabb 000i_iiii => LDBI
+1111_aabb 001i_iiii => LDWI
+1111_aabb 100i_iiii => STBI
+1111_aabb 101i_iiii => STWI
+1111_aabb 010i_iiii => POPB
+1111_aabb 011i_iiii => POPW
+1111_aabb 110i_iiii => PSHB
+1111_aabb 111i_iiii => PSHW
 
 
 Encoding branch conditions:
-- 
2.43.2