From: Cassie Jones <code@witchoflight.com>
Date: Fri, 3 May 2019 19:31:51 +0000 (-0700)
Subject: Update benchmark to match the yosys 4-bit counter
X-Git-Url: https://git.witchoflight.com/minecraft-eda/commitdiff_plain?ds=sidebyside

Update benchmark to match the yosys 4-bit counter

The other minecraft logic synthesis projects have used this as their
placement benchmark, so it's good to match them.
---

diff --git a/.gitignore b/.gitignore
index cc2f533..8809313 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,2 +1,4 @@
 /mc-mask/target
 minecraft.lib
+*.hex
+*.blif
diff --git a/example/counter.sv b/example/counter.sv
index 36f83e4..a775501 100644
--- a/example/counter.sv
+++ b/example/counter.sv
@@ -1,15 +1,13 @@
-module counter #(parameter WIDTH=3, parameter MAX=(1<<WIDTH)-1) (
+module counter #(parameter WIDTH=4) (
     input clock,
     input reset,
+    input enable,
     output logic [WIDTH-1:0] count,
-    output logic max
 );
 
-assign max = count == MAX;
-
 always_ff @(posedge clock) begin
     if (reset) count <= 0;
-    else if (!max) count <= count + 1;
+    else if (enable) count <= count + 1;
 end
 
 endmodule
diff --git a/example/counter.ys b/example/counter.ys
index 4700bfd..cf23357 100644
--- a/example/counter.ys
+++ b/example/counter.ys
@@ -5,3 +5,4 @@ dff2dffe
 abc -liberty minecraft.lib
 stat
 show counter
+write_blif counter.blif