From ba7a87eddf43153f8fa3f03b6c5cd2259e3b8be1 Mon Sep 17 00:00:00 2001
From: Cassie Jones <code@witchoflight.com>
Date: Wed, 4 Mar 2020 23:43:51 +0100
Subject: [PATCH] Add install, use the installed cell libs

The extension needs to load a cell library in order to tech-map things,
and that means having a Verilog file at a locatable path. The Yosys
built-ins put them in the <share>/yosys directory, and so we install
things there and load them from there for convenience.

Using a path +/<path> will be rewritten inside Yosys to load from
<share>/yosys/<path>. I add a nangate/ sub-directory for namespacing
purposes during the install, and load things from +/nangate/<file>.
---
 .gitignore                | 2 ++
 Makefile                  | 4 ++++
 nangate.cc                | 4 ++--
 gateware.sv => techlib.sv | 0
 4 files changed, 8 insertions(+), 2 deletions(-)
 rename gateware.sv => techlib.sv (100%)

diff --git a/.gitignore b/.gitignore
index 8d061bd..fb21455 100644
--- a/.gitignore
+++ b/.gitignore
@@ -2,3 +2,5 @@
 *.d
 *.so
 *.so.dSYM
+*.asc
+*.blif
diff --git a/Makefile b/Makefile
index 819b6dc..8eea1b8 100644
--- a/Makefile
+++ b/Makefile
@@ -9,5 +9,9 @@ test: example/example.sv example/example.ys nangate.so
 nangate.so: nangate.cc erase_b2f_pm.h dff_nan_pm.h share_nan_pm.h
 	yosys-config --build $@ $<
 
+install: nangate.so techlib.sv
+	yosys-config --exec mkdir -p --datdir/nangate
+	yosys-config --exec cp $^ --datdir/nangate/
+
 clean:
 	rm -rf -- *.d *.so *.so.dSYM *_pm.h
diff --git a/nangate.cc b/nangate.cc
index 4aca3f4..4c1a81f 100644
--- a/nangate.cc
+++ b/nangate.cc
@@ -62,7 +62,7 @@ struct NandToNaNPass : public Pass {
     void execute(vector<string> args, Design *design) override {
         log_header(design, "Executing NAND_TO_NaN pass (implementing tom7 logic)\n");
         log_push();
-        Pass::call(design, "read_verilog -lib -sv gateware.sv");
+        Pass::call(design, "read_verilog -lib -sv +/nangate/techlib.sv");
         log_pop();
 
         (void) args;
@@ -157,7 +157,7 @@ struct ShareNaN : public Pass {
 struct TechmapNaN : public Pass {
     TechmapNaN() : Pass("techmap_nan", "techmap NaN gates") {}
     void execute(vector<string>, Design *design) override {
-        Pass::call(design, "techmap -autoproc -extern -map gateware.sv");
+        Pass::call(design, "techmap -autoproc -extern -map +/nangate/techlib.sv");
     }
 } TechmapNaNPass;
 
diff --git a/gateware.sv b/techlib.sv
similarity index 100%
rename from gateware.sv
rename to techlib.sv
-- 
2.47.0