1 4 16-bit general-purpose registers r0, r1, r2, r3
3 ALU2: trap nope add sub and or xor
6 ALUI: lsl lsr asr rol clr set tog ext
10 0000_0000 => HALT: halt
11 0001_0000 => NOPE: nope
12 0ooo_aabb => ALU2: a = a op b
13 1000_aabb => JALR: jalr ra # when a == b
14 1000_aabb => MOVE: a = b # when a != b
15 1001_aaoo => ALU1: a = op a
16 101f_aabb => LDST: a <-> [b]
17 110o_aabb oiiiiiii => BRNC: branch if a op b # when a != b
18 1100_0000 iiiiiiii => JMPI: jump offset
19 1101_aabb fiiiiiii => LSI0: a <-> [imm * 2]
20 1110_aa00 iiiiiiii => ALUA: a = a + imm
21 1110_aa01 ooooiiii => ALUI: a = a op imm
22 1110_aa10 iiiiiiii => LDLI: lo(a) = imm
23 1110_aa11 iiiiiiii => LDUI: hi(a) = imm
24 1111_aabb wpsiiiii => MEM2
27 7654_3210 wps (write | push/pop | size)
29 1111_aabb 000iiiii => LDBI
30 1111_aabb 001iiiii => LDWI
31 1111_aabb 100iiiii => STBI
32 1111_aabb 101iiiii => STWI
33 1111_aabb 010iiiii => POPB
34 1111_aabb 011iiiii => POPW
35 1111_aabb 110iiiii => PSHB
36 1111_aabb 111iiiii => PSHW
39 Encoding branch conditions:
40 We want: eq/ne, test/testn, lt/gt, ule/ugt
41 We have 2 operand bits, so we can encode eq, test, lt, ult, and get the negations by swapping operands.
42 For example, if aa < bb, then we use eq, and if bb < aa, we use ne.
43 This is natural for lt/gt, and the comparison for eq/ne etc. just needs 1 LUT4.
45 Load/store should use register pairs, and then specific registers numbers can encode whether it should use the larger instructions.
47 Skip is valuable because it lets you implement wider add/sub with a relatively short instruction sequence, in particular this wide add is 4 bytes not 5.
48 For instance, you can do:
55 to compute [a2:a1] + [b2:b1]