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(parent: 18113f6) | patch
Add the wait state to the state machine develop
authorCassie Jones <code@witchoflight.com>
Mon, 3 Feb 2020 07:27:35 +0000 (02:27 -0500)
committerCassie Jones <code@witchoflight.com>
Mon, 3 Feb 2020 07:41:06 +0000 (02:41 -0500)
commit3707e3fa2f71ef100aa1dcfd1e486e60480d1ae3
tree4eb97b5615743edaec7e170dce12ac522028d23atree | snapshot
parent18113f6d0854c03abd46eb6a65cc70b1c90e31d3commit | diff
Add the wait state to the state machine

The implementation of the WAIT state currently constantly reads from
memory at the WAIT-ed address, resuming when a nonzero value comes back.
It might be better to have specific support for that in an interrupt
controller type of hardware which would send notifications when the
appropriate address changed.
hardware/core.py diff | blob | history
The "Jade" implementation of the ROSE-8 ISA.
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