descriptionThe "Jade" implementation of the ROSE-8 ISA.
last changeMon, 3 Feb 2020 07:41:06 +0000 (02:41 -0500)
readme

Jade Rose

This is a "Jade" implementation of the ROSE-8 instruction set. It currently contains a very basic assembler and disassembler, and will also eventually have a hardware implementation targeted at FPGAs.

Jade is the common name that I use for my line of CPU implementations.

shortlog
2020-02-03 Cassie JonesAdd the wait state to the state machine develop
2020-02-03 Cassie JonesBegin implementing CPU with fetching and decoding
2020-02-03 Cassie JonesUpdate ISA spec to v0.2.2
2020-01-31 Cassie JonesAdd basic README.md
2020-01-17 Cassie JonesUpdate immediate format to literals
2020-01-17 Cassie JonesMake parser conform to v0.2.1
2020-01-17 Cassie JonesUpgrade spec to v0.2.1
2020-01-17 Cassie JonesUpgrade toolchain to ISA v0.2
2020-01-17 Cassie JonesImprove assembler/disassembler errors
2020-01-15 Cassie JonesImplement wrappers for web
2020-01-13 Cassie JonesUpdate spec
2020-01-13 Cassie JonesAdd disassembler, update spec
2020-01-12 Cassie JonesAdd instruction formatter
2020-01-11 Cassie JonesAdd support for binary, hex, and octal literals
2020-01-11 Cassie JonesAdd decoding with proptest round-trip test
2020-01-11 Cassie JonesAdd a very basic assembler utility
...
heads
19 months ago develop