Add README and an example verilog file
authorCassie Jones <code@witchoflight.com>
Sat, 27 Apr 2019 03:02:08 +0000 (23:02 -0400)
committerCassie Jones <code@witchoflight.com>
Sat, 27 Apr 2019 03:02:08 +0000 (23:02 -0400)
commit73d5207f5edc0ceaca9e1af86f7690b5e39b12a5
treeaf81b978e6d89e5a2692737c834c3912dcc16562
Add README and an example verilog file
README.md [new file with mode: 0644]
example/seg7.sv [new file with mode: 0644]